1. Field of the Invention
One embodiment of the present invention relates to a semiconductor device.
One embodiment of the present invention relates to an object, a method, and a manufacturing method. In addition, one embodiment of the present invention relates to a process, a machine, manufacture, and a composition of matter. One embodiment of the present invention relates to a driving method of a semiconductor device, or a manufacturing method of the semiconductor device.
In this specification and the like, a semiconductor device generally means a device that can function by utilizing semiconductor characteristics. In some cases, a memory device, a display device, an electro-optical device, a semiconductor circuit, or an electronic device includes a semiconductor device.
2. Description of the Related Art
A transistor in which an oxide semiconductor (OS) is contained in its channel formation region (hereinafter such a transistor is referred to as an OS transistor) is known. A variety of semiconductor devices including OS transistors have been proposed.
Patent Document 1 discloses an example in which an OS transistor is used in a dynamic random access memory (DRAM). The OS transistor has extremely low leakage current in an off state (off-state current); thus, a DRAM having a low refresh frequency and low power consumption can be fabricated.
Patent Document 2 discloses a nonvolatile memory including an OS transistor. Unlike flash memories, nonvolatile memories have unlimited cycling capability, can easily operate at high speed, and consume less power.
In such memories including OS transistors, an increase in the threshold voltage of the OS transistors can reduce the off-state current and thus can improve data retention characteristics of the memories. Patent Document 2 discloses an example in which an OS transistor has a second gate (also referred to as a back gate) to control the threshold voltage of the OS transistor so that the off-state current is reduced.
For long-term data retention of the memory, a constant negative potential needs to be continuously applied to the second gate of the OS transistor. Patent Documents 2 and 3 each disclose a configuration example of a circuit for driving a second gate of an OS transistor.
Patent Document 4 discloses a method in which a negative potential is generated by a charge pump and is applied to a second gate of an OS transistor.